Computer Architecture Lab/WS2008

Gruppe 0
Matthias Feurstein

IS1
Vergleich der Instruktionssets von:


 * Z80
 * 1) Atmel AVR
 * 2) ARM7TDMI

Vergleich:
 * [Download pdf]

Gruppe 1
Julian Grahsl

Raffael Trimmal

Miodrag Pejic

Robert Najvirt

Vergleich der Instruktionssets von:

AVR 8-Bit

http://www.atmel.com/dyn/resources/prod_documents/doc0856.pdf

68000

http://www.freescale.com/files/archives/doc/ref_manual/M68000PRM.pdf http://www.freescale.com/files/32bit/doc/ref_manual/MC68000UM.pdf

8080

Zu finden: Hier

Sweet 16 (Gruppe 2)
Franz-Josef Katzdobler, Daniel Reichhard, Stefan Resch, Matthias Wenzl

Instruction Set I
The discussion and the comparison of the instruction sets from can be found here.
 * Zilog Z80
 * Motorola 68000
 * ARM7DI

Documentation

Gruppe 3
Christian Pfeifhofer, Michael Wessner, Michael Zoech

Instruction Set 1
Comparison of the instruction sets of:


 * 1) PICMicro PIC16Cxxx
 * 2) DEC Alpha
 * 3) Intel 4004


 * [Download pdf]

Instruction Set 2
The instruction set of our processor:


 * [Download pdf]

Processor Documentation
The documentation of our processor is available in pdf format:


 * [Download pdf]

AUA (Another Useless Architecture)

 * Rottensteiner Stefan
 * Tauner Stefan
 * Wilhelm Jakob

Instruction Set Comparison

 * AVR32
 * Intel i960
 * SuperH

Our own CPU
A quite standard 16bit RISC implementation with 32 registers and probably a 4 stage pipeline (ex and mem combined).

AUA

Gruppe 5 (Project: MaQuelle)

 * Causevic Emir
 * Isakovic Haris

Instruction Set I

 * Infineon TriCore
 * Freescale MPC7448 (PowerPC)
 * Motorola 68000

Comparison:
 * [Download pdf]